Datenbestand vom 23. März 2024

Warenkorb Datenschutzhinweis Dissertationsdruck Dissertationsverlag Institutsreihen     Preisrechner

aktualisiert am 23. März 2024

ISBN 9783843921312

84,00 € inkl. MwSt, zzgl. Versand


978-3-8439-2131-2, Reihe Elektrotechnik

Jochen Rascher
RF Switch Design for Reconfigurable Power Amplifiers with High Back-off Efficiency in nm-CMOS Technologies

182 Seiten, Dissertation Universität Erlangen-Nürnberg (2015), Softcover, A5

Zusammenfassung / Abstract

A long operating time of mobile communication chip sets is as crucial for their commercial success as their costs. Additionally, both applications, smartphones and wearable devices, offer only a very small space for these chip sets. The solution for these issues consists of the monolithic integration of CMOS power amplifiers and RF switches into a System on Chip comprising also the digital circuits of the baseband processor and the analog/RF circuits of the transceiver. The RF switches can be utilized in order to reconfigure the power amplifier for an increased Power Added Efficiency (PAE) at low to medium power levels. In modern communication standards like UMTS and LTE the power amplifiers do not transmit with maximum power most of the time due to the amplitude modulation formats and the power control by the base station. Thus, the most probable power levels of WCDMA voice and HSPA+ signals are 28dB and 15dB in back-off from the maximum power level, respectively. It is beneficial to implement such a System on Chip in a 65nm CMOS technology because the digital circuits consume less power and area compared to larger technology nodes. However, this technology imposes large challenges on the switch design due to the low robustness of the transistors. Therefore, most of the previous publications demonstrate switch designs in larger CMOS technology nodes like 0.18um or focus on applications at frequencies with two digit GHz values with lower power handling capability requirements. In contrast, this work investigates how RF switches with high power handling capability, low insertion loss, and high isolation can be built in a 65nm CMOS technology with low substrate resistivity. Furthermore, it is analyzed if the thin-oxide transistors offer advantages over the thick-oxide transistors when building switches with these requirements. The former provide lower on-resistance and the latter a higher voltage robustness. Finally, the switch designs of this work are evaluated in two reconfigurable power amplifier architectures, which provide an improved PAE in back-off.