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aktualisiert am 19. Mai 2024

ISBN 9783843939980

84,00 € inkl. MwSt, zzgl. Versand

978-3-8439-3998-0, Reihe Elektrotechnik

Thomas Ungru
Influence of ESD on integrated circuits during operation

150 Seiten, Dissertation Rheinisch-Westfälische Technische Hochschule Aachen (2019), Hardcover, A5

Zusammenfassung / Abstract

In automotive design, integrated circuits (ICs) take over more and more responsibility for safety relevant functions. For that reason, confidence in the functionality is required to provide fail-safe operation, and thus, a high robustness against environmental disturbances is necessary. An electrostatic discharge (ESD) event is such a disturbance, which can induce vast discharge currents into electronic equipment. The focus of this thesis is the investigation of the impact of ESD on the functionality of ICs during operation. ICs exhibit high complexity and have small structure size, and thus, they are especially vulnerable. Although it is an upcoming requirement for IC vendors to provide ICs which are robust against ESD in operation, investigations on IC level have been lacking and there is barley knowledge about the behaviour of ICs stressed by ESD in operation until now. The goal of this work is to reveal relevant coupling paths, to analyse them by measurement and simulation and to define remedial measures. This has been done for different test-structures. The influence of different, significant parameters on the IC’s robustness are discussed, e.g. packaging, die size or circuit design. This results in a novel fundamental understanding of the coupling paths and enables the discussion which remedial measures are possible on IC level. This work also presents remedial design measures and validates them by measurement and simulation. A further advance is the understanding of the impact of ESD stress on the IC’s supply and ground rail voltage. ESD can critically disturb the IC’s supply rails. This effect is especially important, because it can cause functional deviations in any circuit block of an IC. A new modelling technique is developed, which can predict these supply and ground rail deviations for future investigations. Again, this supply rail modelling has been validated against test-structure measurement and simulation. The key result is that this thesis generates a new understanding of the influence of ESD on ICs during operation. From this new knowledge design guidelines can be deduced for the development of ICs with improved robustness against ESD.