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ISBN 978-3-8439-1501-4

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978-3-8439-1501-4, Reihe Kommunikationstechnik

Jan Geldmacher
Adaptive Complexity and Error-Resilient Channel Decoding Concepts

239 Seiten, Dissertation Technische Universität Dortmund (2013), Softcover, A5

Zusammenfassung / Abstract

Channel decoding is employed in modern digital communication systems to correct errors in the received data that have occurred during the transmission to the receiver. Very powerful schemes have been devised for this purpose and are implemented in current systems, including for example the terrestrial Digital Video Broadcasting (DVB-T) and the Long Term Evolution (LTE) mobile communication system. The channel decoder is, however, also one of the computationally most complex parts in a digital receiver. It is thus crucial to find decoder realizations that exhibit the smallest possible workload in order to achieve a power efficient receiver implementation.

Motivated by this observation, this work investigates a concept to reduce the channel decoder workload. This concept is based on the syndrome decoding approach for convolutional codes, which features inherent options for adaptive trellis complexity reduction. Based on this approach the decoder operation can be restricted to those parts of the received data sequence that are actually affected by transmission errors. This yields substantial decoding complexity reductions for good reception conditions, i.e. when only few transmission errors have occurred. Furthermore, it yields a decreased number of equivalent iterations of iterative receiver implementations. Supporting performance results are reported for several practical systems, including the DVB-T and ATSC DTV systems, and the LTE mobile communication system.

Since power savings can not only be achieved by optimization on an algorithmic level, but also by chip level modifications the second part of this thesis studies the impact of hardware induced errors due to strong voltage scaling. In particular the focus is on the influence of unreliable buffer memories on the performance of trellis based decoding and equalization algorithms. Countermeasures to improve error-resilience of these algorithms are developed based on modified transition metrics and optimized index assignments. The resulting performance is investigated for Viterbi decoding, Turbo equalization and Turbo decoding scenarios. These investigations can also be viewed from the general perspective of designing relatively reliable signal processing algorithms for unreliable underlying hardware. Given that today's very high integration depths increase the susceptibility of integrated circuits to soft error events this constitutes an important emerging research topic.